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PATH Hardware Documentation
> PowerBook G3 Series 1999
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The previous version of the NanoKernel has code that is processor-specific to create data structures. With the NewWorld architecture, the Trampoline code creates these data structures from information in the Open Firmware device tree.
NanoKernel is typically no longer changed to support a new CPU. Support for new processors has moved to POST, which is responsible for configuring all processor-specific registers. Runtime cache control is part of RTAS.
